iCell: Intelligent Standard-Cell Library Generator

Developed to meet DTCO requirements in advanced technology nodes, iCell enables automated standard-cell generation and accelerated statistical characterization. It supports layout generation for both combinational and sequential logic cells in planar CMOS and FinFET technologies. Powered by an embedded deep learning engine, iCell delivers over 10× improvement in library generation efficiency.

iScript: Open-Source LLM and EDA Script Generator for Chip Design

We have developed an open-source LLM for chip design to tackle poor performance and high costs of existing models. Based on this, we built iScript—a script generator supporting major EDA tools, now freely available on the official website of The National Center of Technology Innovation for EDA.

iFlow : Domestic EDA Digital Toolchain

Addressing the lack of a full-stack solution in domestic EDA, iFlow integrates 37 tools from 9 EDA vendors, covering the entire digital and analog design flow to resolve interconnectivity issues between point tools. It incorporates an AI-powered Q&A system to reduce barriers to usage. iFlow is dedicated to building a native EDA ecosystem and creating our shared full-stack EDA solution.

Keynote Address：Can Intelligent EDA Really Compute All Circuit?

How can the vision of "Intelligent EDA, Computing All Circuit" be realized? Dr. Jun Yang, the director of NCTIEDA, traces the journey from inspiration to technology breakthrough, delving into the application of LLMs in circuit design and groundbreaking solutions to industry challenges, leading a journey into the universe of Intelligent EDA.

Promotional Video：Chips Unite. Innovation Ignites.

Born in the timeless wisdom of Nanjing—a city sculpted by dynasties and brilliance, the NCTIEDA converges pioneering minds to forge dual engines of progress——the Intelligent EDA and the NX-CDS (Ningxin Chip Design Studio), transforming the industry with landmark breakthroughs such as ChatDV and iRFS. Chips Unite. Innovation Ignites. Join us in shaping the future at NCTIEDA!

ChatDV: the World's First full-stack solution for Digital Circuit Verification

ChatDV, the LLM Agents for digital circuit verification, fundamentally rewrites the paradigm of traditional verification, enabling fully automated, human-out-of-the-loop design and verification flows. At the National EDA Innovation Center, the ChatDV team delivered a live demonstration of the platform’s comprehensive, full-stack automated verification capabilities.

iRFS: World's First Automatic Synthesis Tool for Passive Components in RFIC

iRFS—intelligent integrated software for radio frequency integrated circuits—transforms the entire design flow of RF passive components from schematic to final layout, revolutionizes the once laborious, experience-dependent process of manual tuning and simulation—tasks once deemed prohibitively time-consuming—now completed in a few hours, realizing the automated synthesis of broadband passive components.